Jose Flich got his PhD in 2001 in Computer Engineering. He is Full Professor at UPV where he leads the research activities related to NoCs. Past research activities focused on reconfiguration, routing, coherency protocols and congestion management within NoCs. He has co-invented different routing strategies, reconfiguration and congestion control mechanisms, some of them with high recognition (RECN and LBDR for on-chip networks). Current interests are related to HPC systems for BigData applications with heterogeneity support for energy efficient computing.
 
He has served in different conference program committees (ISCA, PACT, NOCS, ICPP, IPDPS, HiPC, CAC, ICPADS, ISCC), as program chair (INA-OCMC, CAC) and track co-chair (EUROPAR, SC). José Flich has collaborated with different Institutions (Ferrara, Catania, Jonkoping, USC) and companies (AMD, Intel, Sun). He is a member of the HIPEAC NoE. He has co-edited a book for the field of networks-on-chip. He was the Coordinator of the FP7 STREP NaNoC project and currently coordinated the FETHPC MANGO project. He is an active member of the H2020 DeepHealth and H2020 RECIPE projects.